The present invention relates to the field of integrated circuits. More specifically, in one embodiment the invention provides an improved method and device for modeling, testing, and manufacturing integrated circuits.
In the manufacture of integrated circuits, modeling of the circuit behavior has become an important step. In the modeling of a circuit various inputs are applied to a device, the device behavior is simulated, and various outputs are generated. During the modeling process, the designer of an integrated circuit or system is able to ensure that the device generates expected outputs based on selected inputs. The user may also perform a wide variety of other functions including design rule checking. After modeling the device to ensure that the desired behavior is achieved, the designer is able to manufacture a circuit or system with confidence that it will perform in a desired manner.
A wide variety of integrated circuits are modeled by designers in this manner. Exemplary integrated circuits that are modeled by the designer or user of a system include microprocessors, ASICs, gate arrays, and programmable logic devices. One such system includes the Altera MAX+PLUS II.RTM. programmable logic development system and software, and Viewlogic's Viewsim logic simulator.
While meeting with substantial success, prior modeling tools have met with certain limitations. For example, it is possible to inadvertently design the integrated circuit such that a particular pin is used to receive an input and generate an output at the same time.
From the above it is seen that improved integrated circuit design and manufacturing systems and methods are needed.